ARM Cortex-M0

The ATM2 and ATM3 Series devices are built upon the ARM® Cortex®-M0 processor core which is one of the smallest Arm processors available.

The Cortex-M0 has an exceptionally small silicon area, and minimal code footprint, enabling developers to achieve 32-bit performance at an 8-bit price point. When used together with Atmosic's extreme low-power design developers can redefine their product positioning for a greener and more efficient portfolio for sustainability.

Feature	Arm Cortex-M33F
ARM Architecture	ARMv6-M
Bus Interface	AMBA 3 AHB-Lite, Von Neumann bus architecture AHB
ISA Support	Thumb or Thumb-2 subset
ISA Options	Options of single cycle or area optimized 32-x32 multiplier
Pipeline	3-Stages
SysTick timer	SysTick (24-bit)
Interrupts	• Integrated Nested Vectored Interrupt Controller (NVIC) supporting 1 to 32 physical interrupts and a Non-maskable Interrupt (NMI). • 4 priority levels per interrupt.
Wakeup Interrupt Controller	WIC for waking up the processor from state retention power gating or when all clocks are stopped.
Low Power Support	• Architecturally defined Sleep and Deep Sleep Modes Integrated WFI and WFE Instructions and Sleep-On-Exit capability. • Sleep and Deep Sleep indication signals. • Retention Mode.
Debug	JTAG and Serial Wire Debug ports. Up to 4 Breakpoints and 2 Watchpoints

ARM Cortex-M0

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