Atmosic Technologies is looking for a digital design engineer who is passionate about delivering differentiated low-power and battery-free wireless connectivity solutions. Job title and responsibilities commensurate with experience.

Responsibilities:

• Design digital logic to create low-power communications system-on-a-chip (SOC) solutions
• Develop digital logic from initial concept through synthesized RTL  
• Create specifications from high-level requirements to achieve desired system performance
• Implement design using Verilog, System Verilog, and automation scripts
• Develop initial verification, either independently or with assistance of specialized verification team
• Implement initial emulation on a FPGA platform
• Work with digital timing flow tools to reach signoff closure
• Determine optimal constraints to meet digital timing and power requirements
• Work with technical writers to prepare documentation

Requirements:

• Track record of proficient digital design from specification through market introduction
• Familiar with physical design flows including synthesis, LEC, timing, power analysis, PNR, and ECO
• BSEE, MSEE preferred, with 5+ years of relevant experience

Nice to Have:

• Proficiency in digital low power implementation, including strong understanding of CPF and/or UPF
• Proficiency in both setting up timing flow and using the flow for timing closure
• Proficiency in design-for-test; particularly in achieving industry leading coverage when in mass production

Location:

• Campbell (Silicon Valley), California, USA