At Atmosic, we are re-architecting wireless connectivity solutions from the ground up to radically reduce IoT device dependence on batteries. We aim to make batteries last forever and the Internet of Things battery free – thus breaking the power barrier to widespread IoT adoption.
We are looking for a self-driven a Sr. Digital Design Engineer who is passionate about delivering differentiated low-power and battery-free wireless connectivity solutions. You will provide technical leadership with proven expertise to the team.
- Independently design digital logic to create low-power communications system-on-a-chip (SOC) solutions. Go from initial concept to synthesized RTL.
- Create specifications from high-level requirements to achieve desired system performance
- Develop initial verification, either independently or with assistance of specialized verification team.
- Implement initial emulation on a FPGA platform.
- Work with digital timing flow tools to reach signoff closure. Determine optimal constraints to meet digital timing and power requirements.
- Work with technical writers to prepare documentation.
- Create deliverables which do not require close review or supervision.
- Do technical reviews of functional specification, micro-architecture, and RTL code.
- Proven track record of taking SOC’s from design concept through mass production. Ideal candidate would have 5 or more years of demonstrated experience and proficiency in high-performance digital-logic design, integration and verification for SOC development.
- Bachelor degree plus 5+ years of experience.
- Extensive experience in defining SoC architecture.
- Ability to write detailed design specifications and clear presentations.
- Strong experience in RTL design, design verification, and synthesis for high performance and low power
- Proficiency in front-end RTL tools and design methodologies
- Proficiency in both setting up timing flow and using the flow for timing closure.
- Desire to work in a fast paced startup environment
The following skills are considered as a plus:
- Proficiency in digital low power implementation, including strong understanding of CPF and/or UPF.
- Proficiency in design-for-test; particularly in achieving industry leading coverage when in mass production.
- Experience with physical design flows including synthesis, LEC, timing, power analysis, place and route, and ECO.